Electrostatic Sensitive Device!
To prevent equipment damage, use proper grounding techniques.
Electrical Block Diagram
Physical Connector
The Touch Sensor Module has 8 contact pads and a PCB outline that matches that of a standard 0.3-0.33 mm thick FFC/FPC with 1 mm pitch and top mounted connectors:
The contact pads are placed on the backside of the sensor module PCBA.
List of supported FFC connectors:
Supplier | Part number(s) |
527930870, 2005290080 | |
XF3M(1)-0815-1B | |
686108148922 | |
BL124H-8R-TAND |
Pin-Out
Function | Pin name | Pin No | Direction | Description | Comment |
|---|---|---|---|---|---|
Power ground | GND | 1 | - | Ground | |
Reset | N_RST | 2 | Input | Resets sensor module to initial state. Active low. | A minimum of a 300 ns low pulse is required |
Data Ready | DR | 3 | Output | Indicates that sensor module has data to send | Push/pull output. Only used in I2C mode. |
I2C Data | I2C_DATA | 4 | I/O | I2C data line | Requires external pull-up resistor |
I2C Clock | I2C_CLK | 5 | Input | I2C clock line | Requires external pull-up resistor |
USB DM | USB D- | 6 | I/O | USB DM line | USB 2.0 Compliant |
USB DP | USB D+ | 7 | I/O | USB DP line | USB 2.0 Compliant |
Power supply | +5V | 8 | - | +5V power supply | USB 2.0 Compliant |
Note: All pins use 3.3V voltage level and have 5V tolerance.
Interface Configuration
The Touch Sensor Module provides two interfaces for communication with the host system, I2C and USB HID-device. The user can choose to connect one of them, or both. The typical Touch Sensor Module connection to a host system is shown in the following diagram:
USB Connection
The Touch Sensor Module provides a USB full-speed device interface through its 8-pin connector. In this connection, PIN 1, 6, 7, 8 ( GND, USB D-, USB D+, VBUS ) are used. After connecting the sensor module to the host system, it could be enumerated as a normal USB HID-device and act as a digitizer for a touch screen.
In this case, it is recommended to use two 1kΩ pull-up resistors to tie up I2C_DATA and I2C_CLK pins to VBUS or 3.3V power supply to avoid noise issue on I2C interface, and leave other pins as not connected. PIN 2 ( N_RST ) could be used to reset or enable/disable the sensor module.
USB Characteristics
The USB interface meets the requirements of USB specifications 2.0:
Symbol | Parameter | Conditions | Min | Typ | Max | Unit | |
|---|---|---|---|---|---|---|---|
Input levels | VDI | Diff. Input sensitivity | 0.2 | - | - | V | |
VCM | Diff. common mode range | 0.8 | 2.5 | ||||
VSE | Single ended receiver threshold | 1.3 | 2 | ||||
Output levels | VOL | Output level low | 1.5kΩ to VDD | - | - | 0.3 | |
VOH | Output level high | 15kΩ to VSS | 2.8 | - | 3.6 | ||
RPD | D+/D- | VIN=VDD | 17 | 21 | 24 | kΩ | |
RPU | D+/D- | VIN=VSS | 1.5 | 1.8 | 2.1 | ||
USB full speed timings: the definitions of data signal rise and fall time are presented in the following table and figure:
Driver characteristics | ||||
|---|---|---|---|---|
Symbol | Parameter | Conditions | Min | Max |
tr | Rise time | CL = 50pF | 4 | 20 |
tf | Fall time | CL = 50pF | 4 | 20 |
trfm | Rise/fall time matching | tr/tf | 90 | 110 |
VCRS | Output signal crossover | 1.3 | 2 | |
I2C Connection
The Touch Sensor Module provides an I2C interface through its 8-pin connector. The interface runs in fast mode, which means the speed is 400kbps. With this interface, more advanced configuration could be performed. PIN 1, 3, 4, 5, 8 ( GND, DR, I2C_DATA, I2C_CLK, VBUS ) are used for this connection. It is recommended to use two 1kΩ pull-up resistors to tie up I2C_DATA and I2C_CLK pins to VBUS or 3.3V power supply to perform proper I2C communication. If USB connection is not used in parallel, PIN 6, 7 ( USB D-, USB D+ ) could be left unconnected.
After the Touch Sensor Module is powered on, it will act as a slave device on a I2C bus. For further information about what commands could be send or receive through this interface, please refer to I2C Transport.
I2C Characteristics
The I2C interface meets the requirements of the standard I2C communication protocol with the following restrictions: SDA and SCL are mapped to I/O pins that are not “true” open-drain. When configured as open-drain, the PMOS connected between the I/O pin and VDD is disabled, but is still present.
The I2C characteristics are described in the following table:
Symbol | Parameter | Min | Max | Unit |
|---|---|---|---|---|
tw(SCLL) | SCL clock low time | 4.7 | - | us |
tw(SCLH) | SCL clock high time | 4.0 | - | |
tsu(SDA) | SDA setup time | 250 | - | ns |
th(SDA) | SDA data hold time | 0 | - | |
tr(SDA) | SDA and SCL rise time | - | 1000 | |
tr(SCL) | ||||
tf(SDA) | SDA and SCL fall time | 300 | ||
tf(SCL) | ||||
th(STA) | Start condition hold time | 4.0 | - | us |
tsu(STA) | Repeated Start condition setup time | 4.7 | - | |
tsu(STO) | Stop condition setup time | 4.0 | - | |
tw(STO:STA) | Stop to Start condition time (bus free | 4.7 | - | |
tSP | Pulse width of the spikes that are | 0 | 50 | ns |
Cload | Capacitive load for each bus line | - | 400 | pF |
V IL | Input low level voltage | 0.8 | V | |
V IH | Input high level voltage | 2.3 | V | |
V OL | Output low level voltage | 0.4 | V | |
V OH | Output high level voltage | 2.9 | V |
PIN 3 (DR) Characteristics
PIN 3 is used as signal output for DataReady (DR). The DataReady signal is only used in I2C communication.
The sensor module can only act as an I2C slave, therefore this pin is needed to notify the host to read the data in the output buffer of the sensor module:
- PIN 3 is set to high (1) when there is data in the buffer to be sent from the sensor module.
- PIN 3 is reset to low (0) when there is no data in the buffer to be sent from the sensor module.
PIN 3 can be used as an interrupt input or it can be read repeatedly by the host. When the pin is set to high, the FW will wait for the host to read data from the I2C bus. When the read transaction is finished, this Data Ready signal will be reset automatically by the sensor module. The following figure shows the timing behavior of a typical I2C transaction:
I2C Reading Sequence
See I2C Transport.
Power On and Boot Sequence
Power on timing latency are listed in the following table:
| Name | Min | Typ. | Max | Unit | Comment |
|---|---|---|---|---|---|
| t1 | - | 15 | 20 | ms | Delay time from power on to NRST to high voltage. |
| t2 | - | 60 | 70 | ms | Delay time from power on to USB pins voltage ready. |
| t3 | - | 170 | - | ms | Delay time from USB init ready to sending/receiving data. |
| t4 | 5 | 7 | 10 | ms | Delay time from power on to I2C pins voltage ready. |
| t5 | 65 | 70 | 80 | ms | Delay time from I2C pins voltage ready to triggering boot complete packet request. |
The power on sequence is shown in the following figure.
